SCHEDULE: NOV 10-16, 2007

Disruptive Technology for Many-core Chip System Software and Logic Co-verification

Session: Disruptive Technology Exhibits

Event Type: Disruptive Technology Exhibit

Time: 10:00am - 6:00pm

Author(s): Guang R. Gao, Monty Denneau

Location: Exhibit Hall 1B

Abstract:
ETI has developed a disruptive technology for many-core system software and logic co-verification. A complete system may contain many such chips (e.g. 64-bit 160 cores on a chip and many chips in a system in the case of the IBM Cyclops-64 supercomputer).

In this exhibit, we demonstrate the co-verification of ETI multithreaded programming model and system software solution on Mrs. Clops - a parallel FPGA based supercomputer for Cyclops-64 emulation. Based on the DIMES (Delaware Iterative Emulation System) Technology, the Mrs. Clops engine can emulate multiple Cyclops-64 chips at the gate-level at high speed. This allows ETI system software be booted entirely on a multi-chip C64 system configuration with a large number of parallel programs be executed for co-verification. The innovative ETI TNT (TinyThread) programming model will be demonstrated in addition to legacy SHMEM and OpenMP. Attendees will be able to experience the entire ETI software solution on demonstration in our booth. Programming techniques will be demonstrated at the source code level.

Chair/Author Details:

Guang R. Gao
University of Delaware / ET International Inc.

Monty Denneau
IBM Research

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